Samsung Unveils AI Memory Strategy with CXL and AMD Collaboration

San Jose, California — Samsung Electronics has outlined a memory and storage strategy aimed at addressing the growing demands of artificial intelligence systems, bringing together faster memory, additional capacity and storage technologies that support AI inference.

The company presented its approach at the OCP Global Summit 2026, held October 12–15 at the San Jose McEnery Convention Center. Its program included collaboration with AMD on CXL memory expansion and demonstrations covering how AI systems allocate and store data.

Samsung’s presentation comes as increasingly complex AI workloads place different demands on computing infrastructure. Its approach addresses both the speed at which processors receive data and the amount of information systems can keep available while handling AI tasks.

Hojun Shim, corporate vice president and head of application engineering in Samsung’s memory business, was scheduled to address the summit on October 12. Samsung described his presentation around three priorities: speed, memory expansion and persistence, or retaining data beyond the fastest memory layers.

High-bandwidth memory (HBM), addresses the first of those requirements. The technology stacks memory chips vertically and connects them through microscopic pathways called through-silicon vias. This arrangement supports the large volumes of data movement required by AI training and other demanding computing tasks.

Samsung’s HBM4E offers configurations with up to 64 gigabytes of capacity and bandwidth of up to 4 terabytes per second in a single 16-layer stack.

Adding layers also creates engineering challenges. Samsung acknowledges that taller memory stacks increase thermal and manufacturing demands. Higher capacity therefore requires attention to packaging and heat management as well as the design of the memory itself.

Another part of the strategy involves Compute Express Link, or CXL, an interconnect technology based on PCIe. It provides a way to connect processors with additional memory and other devices, extending capacity beyond conventional server memory channels.

According to Samsung, traditional memory modules connect directly to CPUs through a fixed number of slots. CXL enables systems to add another memory tier, while pooling architectures allow multiple hosts to access shared memory resources.

The intended benefit is more flexible allocation. Instead of treating each server’s memory as an isolated resource, compatible infrastructure can assign pooled capacity according to workload requirements. Samsung identifies AI, high-performance computing and in-memory databases among the applications for this approach.

Its summit material describes joint validation with AMD to examine how CXL memory can expand capacity and bandwidth while reducing periods when CPUs wait for data. Samsung also outlined SSD-backed storage for key-value caches, which hold information used during AI inference.

Samsung’s CXL memory module portfolio provides further detail on the hardware behind that strategy. Its MD310 module supports CXL 3.2 and PCIe 6.0, with the company specifying bandwidth of up to 72 gigabytes per second between servers and memory.

The MD310 product listing identifies 256 gigabytes of DDR5 memory in an E3.S 2T form factor. Samsung says its architecture allows multiple hosts to share and dynamically allocate pooled memory, with the aim of reducing capacity that has been installed but remains unused.

An earlier module, the MD220, is listed with CXL 2.0 and PCIe 5.0 support, offering capacities of 128 or 256 gigabytes.

These products address a different requirement from HBM. Stacked high-bandwidth memory supports intensive data movement, while CXL modules extend the memory accessible to a system. Samsung is pursuing both within a broader infrastructure offering rather than presenting one component as a universal answer to AI computing constraints.

Commercial adoption also depends on the surrounding hardware and software. Samsung’s CXL documentation identifies compatibility, costs and the development of the wider ecosystem as challenges, including the availability and integration of processors, switches, memory devices and supporting applications.

Software must be able to use the added capacity effectively. Samsung describes operating-system drivers and middleware that can expose CXL memory as an expansion resource or a separate tier. Applications and AI frameworks may require software designed to manage those memory arrangements.